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RTL Design Engineer - San Jose, CA at NetSpeed Systems
San Jose, CA, US

 

At NetSpeed Systems we develop the core technology that drives some of the most exciting cutting-edge applications in Advanced Driver Assistance Systems (ADAS), artificial intelligence, cloud computing and more. We work with the most innovative and influential companies in the world to push the boundaries of what’s possible in System-On-Chip (SoC) architecture and design.

We have openings for multiple RTL Design Engineers to work on advanced interconnect IP that is used in a wide variety of SoC applications. The successful candidates will possess a detailed understanding of RTL design, verification, synthesis, and low power techniques. This position is located in San Jose, California.

 

Responsibilities

 

  • Microarchitecture definition

  • Design implementation in RTL, synthesis and timing

  • Developing design specifications and documentation

  • Problem-solving and managing complex issues involving multi-disciplined, cross-functional teams

 

Requirements

  • 5+ years of experience with details of RTL development using Verilog

  • Experience with functional and structural RTL design, design partitioning

  • Experience with simulation and regression, collaboration with design verification and software teams

  • Adept with latest EDA tools including simulation, synthesis and static timing tools

  • Familiarity with the following disciplines is highly desirable: system architecture, AMBA protocols, functional safety and cache coherent systems