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IC Flow and Back-End Engineer at Syntiant
Irvine, CA, US
IC and system-on-chip flow expert, proficient in hardware synthesis, placement, routing, along with timing flows to delivery GDS to a foundry. Assemble and build synthesis flows for padring + digital subsystems Analog + memory MACRO placement and floorplanning Handle SDC constraints for multi-clock designs Generate speed/area/power reports for design verification and timing signoff Handle DFT, scan insertion, clock tree Final physical verification on LVS + DRC + fill ECO flows Process evaluation and target libraries, technology selection Minimum Qualifications for this role: 10+ years of relevant industry experience B.Sc, M.Sc in EE preferred Direct involvement in tools flow development for high-volume production designs