Startup Careers

Be a part of our family by contributing to our portfolio companies’ innovation and success. Browse open positions below with Intel Capital portfolio companies.

Senior/Staff Engineer of IO Design at VeriSilicon
Shanghai, CN
1. Design General IO library and Customization IO library, provide instruction on layout work.
2. Design ESD cell and provide ESD guideline for different foundry and process node.
3. Provide whole chip ESD solution and pad cell floor plan on chip design.
4. ESD/LU test and Failure Analysis if chip has reliability issue.

Requirements: 1. Over 3-years of related working experience in IO & ESD design.
2. M.S. in EE or equivalent.
3. Knowledge in process , device, physical layout.
4. Experience on timing model and IBIS model.
5. Experience on DDR/SD/eMMC/LVDS IO is better.
6. Good communication skills and good team work spirit.

Location: Shanghai