Contribute to our portfolio companies’ success by browsing open positions below.

Serdes Mixed-Signal Design Engineer at Ayar Labs
Santa Clara, CA, US

Serdes Mixed-Signal Design Engineer

The Serdes Mixed Signal Design is responsible for the development of various analog mixed signal blocks such as delay cells, oscillators, gain stages, voltage/current sources. You will work as a part of a small IC design team in a dynamic startup environment. The ideal candidate is a hands-on self-starter who is able to develop design specifications based on input from colleagues, customers, and industry and who can effectively manage his or her own time to take projects to completion with limited supervision and guidance.

  • Develop custom analog mixed-signal blocks for a complex high-speed SoC
  • Work closely with optical and digital teams to implement and optimize mixed signal designs
  • Design, verification, and post-silicon validation of mixed-signal designs
  • Contribute to and use code-based interface for custom layout entry

  • M.S. or Ph.D in Electrical Engineering
  • 5-10 years of working/research experience in high-speed design and/or design of SerDes components such as CTLEs, TIAs, PLLs, DFEs, etc.
  • Have experience designing in advanced CMOS (65nm or below) at data rates of at least 10Gb/s and/or RF circuits operating at 5GHz or above
  • Proficient with Cadence design environment and mixed-signal simulation (ADE, Layout, Spectre)

  • A system-level understanding of both analog frontend and digital link backend for SerDes systems
  • A good understanding of high-speed layout considerations, such as parasitics, crosstalk isolation, supply and bias distribution, etc.
  • Proficiency with chip-level or board-level EM simulation (such as EMX or HFSS)
  • Experience with precision analog and mixed-signal circuits
  • Adaptation algorithms for system level simulations
  • Silicon bring-up, debug, and evaluation
  • Programming experience in Python
"Principals only. Recruiters, remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don’t contact our hiring managers."

At Ayar Labs we are lighting up electronics for a brighter future. With our deep ties to MIT and UC Berkeley, and our commitment to hiring the best engineers in photonics and electronics, joining our team gives you the opportunity to collaborate with brilliant people on challenging, paradigm-shifting work. Our optical I/O technology removes the bottlenecks created by today’s electrical I/O, making it possible to continue the computing system performance scaling that Moore’s Law enabled until now. We have a commitment to win big in the marketplace based on the strengths of our technology, and we approach everything with an eye to massive scalability. We believe that deep cross-collaboration between teams facilitated by honest, open debate is the best way to achieve big wins, leveraging our patent portfolio which promises products that deliver orders of magnitude improvements in latency, bandwidth density, and power consumption. We offer a comprehensive benefits plan designed to keep our team healthy and happy.