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Post Silicon Design Validation Engineer at Ayar Labs
Santa Clara, CA, US

The Post Silicon Design Validation Engineer will perform lab characterization and validation of integrated circuits; and collaborate with many disciplines to lead product development and New Product Introduction (NPI) for the Ayar Labs product. Responsibilities include CMOS and optoelectronic design validation and bring-up, drafting and documenting data sheets, and working with Design, Packaging, and Reliability Engineering to deliver a qualified product. 

Essential Functions:
·  Collaborate with Design Engineering to bring-up leading-edge silicon photonic and optoelectronic products
·  Perform design validation on new chips/products by electrically characterizing CMOS designs
·  Develop scripts to automate tests, extract and store results, and generate reports using database and analysis tools (preferably python)
·  Collaborate with Design Engineering on product improvements through Automatic Test Equipment (ATE), bench, etc. characterization
·  Lead the New Product Introduction by collaborating with Design, Package, and Reliability Engineering
·  Draft and manage datasheets, and support Field Applications Engineering

Basic Requirements:
·  BS/MS in electrical engineering, computer science, computer engineering or equivalent
·  3+ years of experience in bench test, debug, and characterization of integrated circuits (SerDes, PLLs, clocks, memory interfaces, and I/Os)
·  Experience with Product Engineering (VLSI)
·  Experience with CMOS test, characterization, and design validation
·  Familiarity with CMOS circuit debug and maintain lab system test environment
·  Strong technical writing skill is a plus
·  Familiarity with product qualification is a plus

 
 
Principals only. Recruiters, payment for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don’t contact our hiring managers.

ABOUT AYAR LABS
At Ayar Labs we are lighting up electronics for a brighter future. With our deep ties to MIT and UC Berkeley, and our commitment to hiring the best engineers in photonics and electronics, joining our team gives you the opportunity to collaborate with brilliant people on challenging, paradigm-shifting work. Our optical I/O technology removes the bottlenecks created by today’s electrical I/O, making it possible to continue the computing system performance scaling that Moore’s Law enabled until now. We have a commitment to win big in the marketplace based on the strengths of our technology, and we approach everything with an eye to massive scalability. We believe that deep cross-collaboration between teams facilitated by honest, open debate is the best way to achieve big wins, leveraging our patent portfolio which promises products that deliver orders of magnitude improvements in latency, bandwidth density, and power consumption. We offer a comprehensive benefits plan designed to keep our team healthy and happy.