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Principal Design Verification Engineer at Netronome
Boxborough, MA, US

The Principal Design Verification Engineer will be responsible for ensuring the correct operation of the silicon designs produced by the Logic Design Team. 


The essential functions will consist of, but not be limited to the following:

  • Reading the Architectural Specification and understanding the intended behavior of the chip design elements.
  • Creating Verification Test Plans for their design units based on the Design Specifications.
  • Creating verification testbenches from unit level testing up to full-chip based on the design block they are assigned.
  • Developing new SystemVerilog components from bus functional models to test sequences as required by their testbench.
  • Writing tests and test sequences that check the correct operations of the design block.
  • Debugging the design logic RTL to find the root cause of any failing tests.
  • Writing functional coverage coverpoints to confirm all the intended elements of the design were tested.
  • Bring their testing to the final closure of complete functional coverage.
  • Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering or equivalent;
  • 15+ years of design verification experience;
  • Substantial Experience in coverage-driven design verification, networking protocols, system architecture and hardware design;
  • A history of successfully creating world-class DV environments that deliver first-pass bug-free hardware;
  • Expert-level understanding of OOP programming, pseudo-random verification techniques, and functional coverage;
  • Experience with UVM/OVM SystemVerilog, Python, Verilog and Mercurial is preferred
  • Experience verifying 10G+ Ethernet, Interlaken, PCIe, microprocessors and complex cached memory subsystems
  • Packet switching SW, assembly/firmware microcoding (IXP, ARM), and post-silicon validation experience is a plus;
  • Excellent problem solving and advanced debugging skills;
  • Be able to quickly comprehend new challenges and plan the necessary tasks to meet overall objectives in a timely manner;
  • Be self-motivated and able to work independently;
  • Enthusiasm toward driving and embracing the latest in verification methodologies, techniques and languages in a collaborative group setting is seen as a key value.