Startup Careers

Be a part of our family by contributing to our portfolio companies’ innovation and success. Browse open positions below with Intel Capital portfolio companies.

Senior Design Implementation Engineer at VeriSilicon
Chengdu, CN
Descriptions:
  • Master and be familiar with the RTL to GDS design flow.
  • Complete the chip/complex block timing constraint, logic synthesis, STA, test logic circuit design.
  • Complete the chip/complex block P&R, power analysis, physical verification, low power check, ESD check.
  • Develop/maintain the physical design implementation related flow.
  • Provide technical support for customer/FAE/FEE/sales.
 
Requirements:
  • Master of EE or above.
  • More than 4 years experience of large ASIC physical design implementation.
  • Study hard and work actively.
  • Familiar with the main physical design EDA tools.
  • Strong scripting abilities in TCL/PERL.
  • Have following single or multiple experiences: design implementation from RTL to GDS, chip level testing, ASIC coding and simulation, ASIC physical layout, IC manufacture and process.
  • Be able to help Junior Engineer to solve problem.
  • Full of enterprise and the spirit of teamwork, good ability to communicate and express, fluent in Mandarin and English.
 
Location: Chengdu