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High Speed Mixed-Signal Test Engineer at Ayar Labs
Santa Clara, CA, US

The High Speed Mixed-Signal Test Engineer will be responsible for developing wafer-level and package-level tests for Ayar Labs products. They will collaborate with IC Design Engineers (including Design for Test), Optical Design Engineers, and other Test Engineers to deliver automated test and characterization of high-speed (10 GHz and beyond) analog circuits with digital support logic, all integrated with photonic transmitters and receivers. These deliverables include hardware design and test programs, running on Automated Test Equipment (ATE); and will range from high-coverage, low-volume product development to high-efficiency, high-volume manufacturing. The ideal candidate is a hands-on self-starter who is able to develop and complete work based on input from colleagues, and who can effectively manage his or her own time to take projects to completion with limited supervision and guidance.

 

Key Responsibilities

  • Define, develop, implement, and support test systems for analog validation on mixed-signal ICs, particularly for Serializer/Deserializer (SerDes) and transimpedance amplifiers (TIA)
  • In-depth knowledge and hands-on experience with creating automated test benches and/or creating test programs on wafer ATE platforms
  • Scale tests from product development to volume manufacturing
  • Identify gaps in test coverage and design and implement new tests to improve coverage
  • Test and validate product design compliance with margin to specification across all functional areas of the products
  • Review technical specifications and interfaces for conformity to design guidelines and functionality
  • Interpret test data and create reports based on the results
 

About you

  • BS / MS Electrical/Computer Engineering (or equivalent experience)
  • Ability to work with architecture, design, hardware, and firmware engineering teams to design and develop test suite
  • Strong VLSI circuit knowledge required
  • Self-motivated to deliver quality test results in a timely manner
  • Work well in a team environment
  • Collaborate across geographic sites and time zones
 

Preferred Skills

  • Some familiarity with DFT insertion techniques such as Scan, ATPG,  and LBIST
  • Experience with analog/RF design verification, particularly in the area of high-speed (10Gbps+) serial interfaces
  • Experience with one or more of ATE platforms
  • Ability to read and understand FW code
  • Ability to analyze and understand complex architecture, firmware, software, and hardware specifications
  • Experience working in Windows and Linux environments
  • Strong organizational and planning skills
  • Desire to work in a fast-paced environment
  • Excellent written (white papers) and oral communication skills
 

About Ayar Labs

At Ayar Labs we are lighting up electronics for a brighter future. With our deep ties to MIT and UC Berkeley, and our commitment to hiring the best engineers in photonics and electronics, joining our team gives you the opportunity to collaborate with brilliant people on challenging, paradigm-shifting work. Our optical I/O technology removes the bottlenecks created by today’s electrical I/O, making it possible to continue the computing system performance scaling that Moore’s Law enabled until now. We have a commitment to win big in the marketplace based on the strengths of our technology, and we approach everything with an eye to massive scalability. We believe that deep cross-collaboration between teams facilitated by honest, open debate is the best way to achieve big wins, leveraging our patent portfolio which promises products that deliver orders of magnitude improvements in latency, bandwidth density, and power consumption. We offer a comprehensive benefits plan designed to keep our team healthy and happy.