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SoC Chip Architecture at SiFive
Shanghai, CN
At SiFive, you’ll be part of a fun, engaging team and be afforded the opportunity to grow within the company. You will bring fruition the new RISC-V architecture and enable its rapid adoption by implementing new tools, breakthrough design methods and services. We need people who are trail-blazers, aren’t afraid to take a chance, and don’t always “go with the flow”.

Responsibilities:

    • Architect and implement customized SoC in advanced CMOS nodes
    • Identify proper ARM/RISC cores for SoC applications
    • Work with customer to transfer system requirements to Chip Spec
    • Integrate foundry/third-party/our company's IPs
    • Onboard debugging with HW/SW team
    • Bus architecture design with performance evaluation
    • Configuration for configurable in-house and 3rd party IPs, including: CPU, DSP, Bus, DDR, etc.

Qualifications:

    • BS degree or equivalent practical experience. MS in EE or CS is preferred.
    • 8+years’ experience in ASIC/SoC development and chip architecture definition
    • Familiar with ARM / RISC CPU architecture and SoC interface IPs including SPI, I2C, UART, SDIO, DDR, PCIe, etc.
    • Experience in SOC design flow including but not limited to spec definition, micro architecture design, Verilog coding, functional verification and silicon validation
    • Expert level proficiency in Verilog coding, logic synthesis, STA and DFT implementation
    • Familiar with foundry lib, IP and process technology limitation
    • Familiar with tool chain (RTL, P&R, timing analysis/closure, power analysis, etc.)
    • Good people and communication skills in Mandarin and English

Big Plus:

    • Experience of low power IoT ASIC/SoC architecture design
    • Experience of hardware design with chisel
    • Experience of AI related SoC development with algorithm knowledge
    • Experience of RISC-V CPU related project