Startup Careers

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Digital IC Verification Engineer at Prophesee
Paris, FR

We are looking for a passionate individual who demonstrates initiative, takes ownership, respects commitments, and exhibits a high level of autonomy and spirit of innovation. The ideal candidate would be a multitasking and creative digital IC verification engineer. You will be accountable for developing tests and for verifying complex digital circuits to be integrated in the vision sensor. Moreover, you will be defining coverage points and metrics.

You will have the responsibility of building block and top level random constrained test benches, create directive tests for verification and coverage closure, run simulations, regressions and debug failures working closely with design engineers.

This is a great opportunity to join a fast-growing company and an exciting team and to lead a paradigm shift in computer vision across many industries while working with major electronics companies around the world


  • Define and implement verification methodologies.
  • Define block and top-level random constrained test benches.
  • Run simulations (on RTL and netlist).
  • Implement regression tests.
  • Define signoff methodologies.
  • Support analog team in setting up mixed-mode simulations.
  • Prepare detailed written specifications, verification plan, test protocols and test reports.
  • Work in close collaboration with the whole R&D team.
  • Contribute to the support activities for any technical post-sales issues.
  • Keep up to date with new standards and general market information in the Industry.
  • Participate in Technology / Supplier / Tool Selection
  • Participate in developing methodologies and flow efficiencies.



  • MSc or PhD in Electrical or Computer Engineering, Physics or similar
  • 2+ years of hands-on experience in digital IC verification


  • Knowledge of C++, python, shell scripting.
  • Knowledge of System Verilog and UVM methodology.
  • Knowledge of hardware description languages (Verilog/VHDL) and RTL design flow.
  • Knowledge of SVA and/or PSL.
  • Experience in simulation and debug tools such as Cadence IES or Mentor Graphics Questa.
  • Experience in functional and code coverage.

Preferred qualifications:

  • Knowledge in FPGAs/ASICs design.
  • Experience in image/vision sensor processing, USB, I2C, MIPI protocols.
  • Experience in formal verification is a plus.
  • Experience in gate level simulation is a plus.

Personal skills:



  • Strong problem solving skills, strong analytical skills.
  • Flexible to dynamic environments and fast changing technologies.
  • Passionate about technology.
  • Ability to work well with other engineers in a team environment. Good sense of autonomy.
  • Must be pragmatic and self-motivated to complete a task even if it is outside of just the “well known” realm. “Can Do Attitude”.


TRAVEL REQUIREMENTS: Europe mostly. Occasionally in North America or Asia.

Frequency: up to 10% of the working time